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Thin Film Transistors (TFTs) are the core part of the active matrix displays and other electronic devices such as optics, medical imaging and microelectronics. Conventional TFT devices are fabricated on amorphous and/or polycrystalline silicon. Recently, for better performance, the shift from a crystalline silicon TFT to an amorphous silicon TFT has been done. However, despite the great advantages provided by a-Si TFTs, their use is limited in practice. For example, the performance of a-Si TFTs is known to be limited by the density of defects and grain boundaries in the silicon film. A high temperature annealing process is required to activate or “crystallize” the silicon film to remove these defects and grain boundaries and provide the best device performance. However, the high temperatures (e.g. 600° C. and above) required in a-Si TFTs lead to an unacceptable high cost and low manufacturing yield, making this technology impractical for large area displays. This process is well known in the art and is described in a variety of publications, including, for example, U.S. Pat. No. 5,541,823 to El Haloui et al. and U.S. Pat. No. 5,538,935 to Beresford et al.
Poly-Si TFTs can be fabricated by processes that are compatible with large scale production (e.g. low cost and high yield) compared to amorphous silicon TFTs. However, poly-Si TFTs have a number of disadvantages, such as, inferior field effect mobility compared to a-Si, a lower performance device in direct current (DC) characteristics, lower current on/off ratios and the inability to realize p-channel devices. Thus, conventional poly-Si TFTs have been used for applications where the low cost and small size of a-Si TFTs are not essential.
As a result of many research and development efforts, an alternative technology to a-Si and poly-Si has been developed
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